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"Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs."
Hiroki Matsutani et al. (2010)
- Hiroki Matsutani, Michihiro Koibuchi, Daisuke Ikebuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano:
Ultra Fine-Grained Run-Time Power Gating of On-chip Routers for CMPs. NOCS 2010: 61-68
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