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"Low power and area SHA-256 hardware accelerator on Virtex-7 FPGA."
Ali H. Gad et al. (2020)
- Ali H. Gad, Seif Eldeen E. Abdalazeem, Omar A. Abdelmegid, Hassan Mostafa:
Low power and area SHA-256 hardware accelerator on Virtex-7 FPGA. NILES 2020: 181-185
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