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"Design and Simulation of Logic Circuits with Hybrid Architectures of ..."

Aranggan Venkataratnam, Ashok K. Goel (2006)

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DOI: 10.1109/NANONET.2006.346218

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  - https://dblp.org/rec/conf/nanonet/VenkataratnamG06
Aranggan Venkataratnam, Ashok K. Goel:
Design and Simulation of Logic Circuits with Hybrid Architectures of Single Electron Transistors and Conventional Devices. Nano-Net 2006: 1-5

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