"A compact 14-bit 110 KS/s two-stage incremental ΣΔ ADC for CMOS ..."

Francesco Giorgio, Bhaskar Choubey (2017)

Details and statistics

DOI: 10.1109/MWSCAS.2017.8053139

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

a service of  Schloss Dagstuhl - Leibniz Center for Informatics