"High level circuit synthesis with system level Statistical Static Timing ..."

Abu M. Baker, Ling Wang, Yingtao Jiang (2013)

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DOI: 10.1109/MWSCAS.2013.6674774

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-29

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Abu M. Baker, Ling Wang, Yingtao Jiang:
High level circuit synthesis with system level Statistical Static Timing Analysis under process variation. MWSCAS 2013: 817-820

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