Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Synthesizing Formal Models of Hardware from RTL for Efficient Verification ..."

Yao Hsiao et al. (2021)

> Home

Details and statistics

DOI: 10.1145/3466752.3480087

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/micro/HsiaoMNPT21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/micro/HsiaoMNPT21
Yao Hsiao, Dominic P. Mulligan, Nikos Nikoleris, Gustavo Petri, Caroline Trippel:
Synthesizing Formal Models of Hardware from RTL for Efficient Verification of Memory Model Implementations. MICRO 2021: 679-694

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.