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"A Computation-Aware TPL Utilization Procedure for Parallelizing the ..."

Lan-Da Van et al. (2021)

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DOI: 10.1109/MCSOC51149.2021.00033

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-26

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  dblp key:
  - conf/mcsoc/VanWTJ21
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Lan-Da Van, Tao-Jung Wang, Sing-Jia Tzeng, Tzyy-Ping Jung:
A Computation-Aware TPL Utilization Procedure for Parallelizing the FastICA Algorithm on a Multi-Core CPU. MCSoC 2021: 171-177

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