"Register-transfer level fault modeling and test evaluation techniques for ..."

Pradip A. Thaker, Vishwani D. Agrawal, Mona E. Zaghloul (2000)

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DOI: 10.1109/TEST.2000.894305

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Pradip A. Thaker, Vishwani D. Agrawal, Mona E. Zaghloul:
Register-transfer level fault modeling and test evaluation techniques for VLSI circuits. ITC 2000: 940-949

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