"PV-Clock: Process Variation-Aware 3D Clock Network Synthesis for Robust ..."

Yiyu Wang et al. (2025)

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DOI: 10.1109/ISVLSI65124.2025.11130256

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type: Conference or Workshop Paper

metadata version: 2025-09-06

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Yiyu Wang, Vasilis F. Pavlidis, Rui Wang, Yuanqing Cheng:
PV-Clock: Process Variation-Aware 3D Clock Network Synthesis for Robust and Power-Efficient Timing Optimization. ISVLSI 2025: 1-6

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