"On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power ..."

Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu (2014)

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DOI: 10.1109/ISVLSI.2014.76

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Arunkumar Vijayakumar, Vinay C. Patil, Sandip Kundu:
On Maximizing Decoupling Capacitance of Clock-Gated Logic for Robust Power Delivery. ISVLSI 2014: 510-515

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