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"CMOS Realization of Online Testable Reversible Logic Gates."

Dilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson (2005)

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DOI: 10.1109/ISVLSI.2005.23

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  persistent URL:
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Dilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson:
CMOS Realization of Online Testable Reversible Logic Gates. ISVLSI 2005: 309-310

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