"Boundary-Power Overlapped Design for Sub-3nm Standard Cell Placement."

Jaeha Lee et al. (2025)

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DOI: 10.1109/ISVLSI65124.2025.11130312

access: closed

type: Conference or Workshop Paper

metadata version: 2025-09-02

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Jaeha Lee, Woonseon Cheon, Yunseok Noh, Huijae Lim, Subin Jin, Shinwoo Kim, Hayoung Kim, Sanghoon Baek:
Boundary-Power Overlapped Design for Sub-3nm Standard Cell Placement. ISVLSI 2025: 1-6

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