"Interfacing UML 2.0 for Multiprocessor System-on-Chip Design Flow."

Jouni Riihimäki et al. (2005)

> Home

Details and statistics

DOI: 10.1109/ISSOC.2005.1595656

access: closed

type: Conference or Workshop Paper

metadata version: 2020-04-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/issoc/RiihimakiKKHH05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/issoc/RiihimakiKKHH05
Jouni Riihimäki, Petri Kukkala, Tero Kangas, Marko Hännikäinen, Timo D. Hämäläinen:
Interfacing UML 2.0 for Multiprocessor System-on-Chip Design Flow. SoC 2005: 108-111

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.