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"A 0.5-to-0.9V, 3-to-16Gb/s, 1.6-to-3.1pJ/b wireline transceiver equalizing ..."

Ashwin Ramachandran, Tejasvi Anand (2018)

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DOI: 10.1109/ISSCC.2018.8310287

access: closed

type: Conference or Workshop Paper

metadata version: 2018-03-14

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Ashwin Ramachandran, Tejasvi Anand:
A 0.5-to-0.9V, 3-to-16Gb/s, 1.6-to-3.1pJ/b wireline transceiver equalizing 27dB loss at 10Gb/s with clock-domain encoding using integrated pulse-width modulation (iPWM) in 65nm CMOS. ISSCC 2018: 268-270

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