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"25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an ..."

Hyun-Woo Lee et al. (2014)

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DOI: 10.1109/ISSCC.2014.6757502

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-10

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  dblp key:
  - conf/isscc/LeeSHBLLPCCCKCK14
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  - https://dblp.org/rec/conf/isscc/LeeSHBLLPCCCKCK14
Hyun-Woo Lee, Junyoung Song, Sangah Hyun, Seunggeun Baek, Yuri Lim, Jungwan Lee, Minsu Park, Haerang Choi, Changkyu Choi, Jin-Youp Cha, Jaeil Kim, Hoon Choi, Seung-Wook Kwack, Yonggu Kang, Jongsam Kim, Junghoon Park, Jonghwan Kim, Jin-Hee Cho, Chulwoo Kim, Yunsaing Kim, Jaejin Lee, Byong-Tae Chung, Sung-Joo Hong:
25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty-cycle corrector. ISSCC 2014: 434-435

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