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"14.4 A 5GHz -95dBc-reference-Spur 9.5mW digital fractional-N PLL using ..."
Hyojun Kim et al. (2015)
- Hyojun Kim, Jinwoo Sang, Hyunik Kim, Youngwoo Jo, Taeik Kim, Hojin Park, SeongHwan Cho:
14.4 A 5GHz -95dBc-reference-Spur 9.5mW digital fractional-N PLL using reference-multiplied time-to-digital converter and reference-spur cancellation in 65nm CMOS. ISSCC 2015: 1-3
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