"A 4.2GHz 0.3mm2 256kb Dual-Vcc SRAM Building Block in 65nm CMOS."

Muhammad M. Khellah et al. (2006)

Details and statistics

DOI: 10.1109/ISSCC.2006.1696323

access: closed

type: Conference or Workshop Paper

metadata version: 2024-04-26

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