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"A High Speed VLSI Implementation of 256-bit Scalar Point Multiplier for ..."

Jianwei Liu et al. (2018)

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DOI: 10.1109/IISR.2018.8535680

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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Jianwei Liu, Zhenyu Guan, Dongxu Cheng, Ziyu Wang:
A High Speed VLSI Implementation of 256-bit Scalar Point Multiplier for ECC over GF (p). ISR 2018: 184-191

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