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"Improving timing error tolerance without impact on chip area and power ..."

Ken Yano, Takanori Hayashida, Toshinori Sato (2013)

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DOI: 10.1109/ISQED.2013.6523638

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-27

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  - conf/isqed/YanoHS13
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Ken Yano, Takanori Hayashida, Toshinori Sato:
Improving timing error tolerance without impact on chip area and power consumption. ISQED 2013: 373-378

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