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"Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA ..."

Naoyuki Matsumoto, Koji Nakano, Yasuaki Ito (2015)

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DOI: 10.1109/ISPDC.2015.23

access: closed

type: Conference or Workshop Paper

metadata version: 2023-11-12

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  - conf/ispdc/MatsumotoNI15
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  - https://dblp.org/rec/conf/ispdc/MatsumotoNI15
Naoyuki Matsumoto, Koji Nakano, Yasuaki Ito:
Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA Implementations. ISPDC 2015: 138-147

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