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"Deep Neural Network Training Accelerator Designs in ASIC and FPGA."
Shreyas K. Venkataramanaiah et al. (2020)
- Shreyas K. Venkataramanaiah, Shihui Yin, Yu Cao, Jae-Sun Seo:
Deep Neural Network Training Accelerator Designs in ASIC and FPGA. ISOCC 2020: 21-22
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