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"Extreme Low Power Technology using Ternary Arithmetic Logic Circuits via ..."

Kiyung Kim et al. (2020)

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DOI: 10.1109/ISMVL49045.2020.00-13

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

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Kiyung Kim, Sunmean Kim, Yongsu Lee, Daeyeon Kim, So-Young Kim, Seokhyeong Kang, Byoung Hun Lee:
Extreme Low Power Technology using Ternary Arithmetic Logic Circuits via Drastic Interconnect Length Reduction. ISMVL 2020: 155-158

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