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"Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based ..."

Takashi Hirayama et al. (2023)

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DOI: 10.1109/ISMVL57333.2023.00038

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-28

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  - conf/ismvl/HirayamaSYN23
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Takashi Hirayama, Rin Suzuki, Katsuhisa Yamanaka, Yasuaki Nishitani:
Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits. ISMVL 2023: 153-157

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