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"Nanoscale CMOS circuit leakage power reduction by double-gate device."
Keunwoo Kim et al. (2004)
- Keunwoo Kim, Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang:
Nanoscale CMOS circuit leakage power reduction by double-gate device. ISLPED 2004: 102-107
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