"Design of 50 MHz PLL using indigenous SCL 180 nm CMOS Technology."

Chandra Shekhar, Shafi Qureshi (2021)

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DOI: 10.1109/ISES52644.2021.00016

access: closed

type: Conference or Workshop Paper

metadata version: 2022-02-14

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Chandra Shekhar, Shafi Qureshi:
Design of 50 MHz PLL using indigenous SCL 180 nm CMOS Technology. iSES 2021: 12-17

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