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"Design and Analysis of FinFET Based CSCPAL Low Power Adder."

Jayashree K. G et al. (2019)

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DOI: 10.1109/ISES47678.2019.00039

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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  dblp key:
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Jayashree K. G, Lois Priscilla S, Bhuvana B. P., V. S. Kanchana Bhaaskaran:
Design and Analysis of FinFET Based CSCPAL Low Power Adder. iSES 2019: 139-144

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