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"Trace-Driven Simulation and Design Space Exploration of Network-on-Chip ..."

G. S. Sangeetha et al. (2018)

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DOI: 10.1109/ISED.2018.8703884

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

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G. S. Sangeetha, Vignesh Radhakrishnan, Prabhu B. M. Prasad, Khyamling Parane, Basavaraj Talawar:
Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA. ISED 2018: 129-134

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