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"Design and Analysis of a Robust, High Speed, Energy Efficient 18 ..."

Subhramita Basak et al. (2012)

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DOI: 10.1109/ISED.2012.23

access: closed

type: Conference or Workshop Paper

metadata version: 2019-05-25

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Subhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, Chandan Kumar Sarkar:
Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme. ISED 2012: 130-134

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