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"Increment/decrement/2's complement/priority encoder circuit for varying ..."

P. Sai Phaneendra et al. (2011)

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DOI: 10.1109/ISCIT.2011.6092152

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-08

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P. Sai Phaneendra, Chetan Vudadha, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas:
Increment/decrement/2's complement/priority encoder circuit for varying operand lengths. ISCIT 2011: 472-477

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