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"A study of floating-point architectures for pipelined RISC processors."

J. A. P. Reyes, Louis P. Alarcón, L. Alarilla Jr. (2006)

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DOI: 10.1109/ISCAS.2006.1693184

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  - https://dblp.org/rec/conf/iscas/ReyesAA06
J. A. P. Reyes, Louis P. Alarcón, L. Alarilla Jr.:
A study of floating-point architectures for pipelined RISC processors. ISCAS 2006

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