"A 41.7 MS/s 2.4 ps-rms-jitter Time Converter With 4-Core Interleaved ..."

Francesco Malanga et al. (2025)

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DOI: 10.1109/ISCAS56072.2025.11043405

access: closed

type: Conference or Workshop Paper

metadata version: 2025-07-08

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Francesco Malanga, Mehmet Caglar Koca, Mehmet Ali Uluisik, Giulia Acconcia, Ivan Rech:
A 41.7 MS/s 2.4 ps-rms-jitter Time Converter With 4-Core Interleaved Analog-Multiplexed Architecture. ISCAS 2025: 1-5

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