"Digital Twin Assisted Performance Aware Power Management for FPGA MPSoC ..."

Kartik Laad et al. (2025)

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DOI: 10.1109/ISCAS56072.2025.11044036

access: closed

type: Conference or Workshop Paper

metadata version: 2025-07-08

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Kartik Laad, Ratnala Vinay, Parveen Nisha, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya:
Digital Twin Assisted Performance Aware Power Management for FPGA MPSoC using High Speed Reinforcement Learning. ISCAS 2025: 1-5

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