"Fast estimation of area-delay trade-offs in circuit sizing."

Shrirang K. Karandikar, Sachin S. Sapatnekar (2005)

Details and statistics

DOI: 10.1109/ISCAS.2005.1465402

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.