"A 1.2V 1MS/s 7.65fJ/conversion-step 12-bit hybrid SAR ADC with ..."

Sung-En Hsieh, Cheng-Kang Ho, Chih-Cheng Hsieh (2015)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2015.7169175

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/HsiehHH15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/HsiehHH15
Sung-En Hsieh, Cheng-Kang Ho, Chih-Cheng Hsieh:
A 1.2V 1MS/s 7.65fJ/conversion-step 12-bit hybrid SAR ADC with time-to-digital converter. ISCAS 2015: 2429-2432

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.