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"Encoder architecture with throughput over 10 Gbit/sec for quasi-cyclic ..."

Zhiyong He, Sébastien Roy, Paul Fortier (2006)

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DOI: 10.1109/ISCAS.2006.1693323

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Zhiyong He, Sébastien Roy, Paul Fortier:
Encoder architecture with throughput over 10 Gbit/sec for quasi-cyclic LDPC codes. ISCAS 2006

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