"A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop."

Uday Kiran Naidu Ekkurthi et al. (2021)

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DOI: 10.1109/ISCAS51556.2021.9401379

access: closed

type: Conference or Workshop Paper

metadata version: 2021-07-02

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Uday Kiran Naidu Ekkurthi, Venkatesh Dasari, Jyoshnavi Akiri, Chua-Chin Wang:
A 100 MHz 9.14-mW 8-Bit Shift Register Using Double-Edge Triggered Flip-Flop. ISCAS 2021: 1-4

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