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"FPGA Implementation of a Pseudo-Random Signal Generator for RF Hardware ..."

Randeep S. Baweja et al. (2020)

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DOI: 10.1109/IPCCC50635.2020.9391555

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-06

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Randeep S. Baweja, Devin B. Ridge, Harpreet S. Dhillon, William C. Headley:
FPGA Implementation of a Pseudo-Random Signal Generator for RF Hardware Test and Evaluation. IPCCC 2020: 1-7

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