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"High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for ..."

Yu Ting Chen et al. (2019)

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DOI: 10.1109/ICFPT47387.2019.00071

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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  dblp key:
  - conf/icfpt/ChenKLHA19
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Yu Ting Chen, Jin Hee Kim, Kexin Li, Graham Hoyes, Jason Helge Anderson:
High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing. FPT 2019: 375-378

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