"Design and VLSI Implementation of Interpolators/Decimators for DUC/DDC."

Y. N. Santhosh, Namita Palacha, Cyril Prasanna Raj (2010)

> Home

Details and statistics

DOI: 10.1109/ICETET.2010.72

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/icetet/SanthoshPP10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icetet/SanthoshPP10
Y. N. Santhosh, Namita Palacha, Cyril Prasanna Raj:
Design and VLSI Implementation of Interpolators/Decimators for DUC/DDC. ICETET 2010: 755-759

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.