"The design of low power multiple-valued logic encoder and decoder circuits."

I. Thoidis et al. (1999)

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DOI: 10.1109/ICECS.1999.814484

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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I. Thoidis, D. J. Soudris, Ioannis Karafyllidis, Adonios Thanailakis:
The design of low power multiple-valued logic encoder and decoder circuits. ICECS 1999: 1623-1626

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