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ORCID"VHDL-AMS modeling of a multi-standard phase locked loop."
Benjamin Nicolle et al. (2005)
- Benjamin Nicolle, Lionel Geynet, Emeric de Foucauld, William Tatinian, Gilles Jacquemod:
VHDL-AMS modeling of a multi-standard phase locked loop. ICECS 2005: 1-4
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