"28-nm FD-SOI Dual-Port SRAM with MSB-Based Inversion Logic for Low-Power ..."

Haruki Mori et al. (2018)

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DOI: 10.1109/ICECS.2018.8617885

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-11

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Haruki Mori, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
28-nm FD-SOI Dual-Port SRAM with MSB-Based Inversion Logic for Low-Power Deep Learning. ICECS 2018: 161-164

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