


default search action
"4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um ..."
Jong-Ho Lee et al. (2008)
- Jong-Ho Lee, Yun-Jeong Kim, Suki Kim, Kwang-Hyun Baek:
4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOS. ICECS 2008: 267-270

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.