"An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS ..."

Ranganathan Desikachari et al. (2007)

Details and statistics

DOI: 10.1109/ICECS.2007.4511074

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

a service of  Schloss Dagstuhl - Leibniz Center for Informatics