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"A VLSI array architecture with dynamic frequency clocking."
N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar (1996)
- N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar:
A VLSI array architecture with dynamic frequency clocking. ICCD 1996: 137-140

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