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"A Low Power Miller Compensation Technique for Two Stage Op-amp in 65nm ..."
Rajasekhar Nagulapalli et al. (2019)
- Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu:
A Low Power Miller Compensation Technique for Two Stage Op-amp in 65nm CMOS Technology. ICCCNT 2019: 1-5
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