"Recursive Bipartitioning of BDDs for Performance Driven Synthesis of Pass ..."

Rupesh S. Shelar, Sachin S. Sapatnekar (2001)

> Home

Details and statistics

DOI: 10.1109/ICCAD.2001.968674

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/iccad/ShelarS01
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iccad/ShelarS01
Rupesh S. Shelar, Sachin S. Sapatnekar:
Recursive Bipartitioning of BDDs for Performance Driven Synthesis of Pass Transistor Logic Circuits. ICCAD 2001: 449-452

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.