"/TPlace: Machine Learning-Based Delay-Aware Transistor Placement for ..."

Tai-Cheng Lee, Cheng-Yen Yang, Yih-Lang Li (2020)

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DOI: 10.1145/3400302.3415613

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-18

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Tai-Cheng Lee, Cheng-Yen Yang, Yih-Lang Li:
/TPlace: Machine Learning-Based Delay-Aware Transistor Placement for Standard Cell Synthesis. ICCAD 2020: 159:1-159:8

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