"Verification of RTL generated from scheduled behavior in a high-level ..."

Pranav Ashar et al. (1998)

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DOI: 10.1145/288548.289080

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/iccad/AsharBRM98
Pranav Ashar, Subhrajit Bhattacharya, Anand Raghunathan, Akira Mukaiyama:
Verification of RTL generated from scheduled behavior in a high-level synthesis flow. ICCAD 1998: 517-524

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