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"New hardware-efficient algorithm and architecture for the computation of ..."

Shen-Fu Hsiao, Wei-Ren Shiue (1999)

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DOI: 10.1109/ICASSP.1999.757601

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  dblp key:
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  persistent URL:
  - https://dblp.org/rec/conf/icassp/HsiaoS99a
Shen-Fu Hsiao, Wei-Ren Shiue:
New hardware-efficient algorithm and architecture for the computation of 2-D DCT on a linear systolic array. ICASSP 1999: 3517-3520

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